Modern computer systems support communications at many different levels. An individual computer comprises a variety of different processors communicating with each other. A single central processing unit (CPU) is typically the basic workhorse of the computer, but other processors control disk storage devices, printers, terminals, communications with other computers, etc. Even more remote and primitive processors may control other functions, such as monitoring sensors, input keypads, etc. In addition, multiple computer systems may be connected to s network, whereby they may communicate with each other. Each of these processors or systems must have some defined path for communications.
Design requirements for communications paths vary. A typical computer system will have several paths which must support high speed mass data transfer. For example, when a block of code is loaded from a magnetic disk storage device into main memory, the volume of data being transferred requires a very fast, efficient mechanism.
To support mass data transfer operations, most computer systems employ some form of burst data transfer protocol. A burst protocol typically comprises an initialization part, a data transfer part, and a concluding part. In the initialization part, the sender informs the receiver of the pending transmission, providing information necessary for the receiver to prepare itself. For example, the sender may tell the receiver the number of bytes to be transferred, a forwarding destination for the data, etc. The receiver may be required to acknowledge receipt of initialization information before the sender can start transmitting the main body of data. In some protocols, initialization will involve several exchanges between sender and receiver. After initialization is complete, the sender sends the data, without further intervening exchanges. When all data has been transmitted, the concluding part of the transmission occurs. The receiver will typically perform some error checking of the transmission, as for example, by verifying parity bits, or that the correct number of bytes were received. The receiver will then send an acknowledgment message to the sender, indicating either that the data was received without error or that some error was detected. As in the case of initialization, the concluding part may involve more than a single exchange between sender and receiver. Although there is some overhead associated with the initialization and concluding phases, in the case of a large data transfer this overhead is offset by the fact that the data transfer phase is large in comparison to the other two phases.
The essential feature of burst communication is that the data transfer takes place at high speed and without interruption. This feature places certain constraints on the design of the sender and receiver devices. On the one hand, it is desirable that both devices operate as fast as the physical limitations of the devices will permit. On the other hand, the devices must be able to-keep up with each other or communication errors will result. A typical system communications bus may have a variety of devices of different types attached. Because these devices perform different functions,, they will not all be able to produce or consume data at the same rate. If each device is allowed to produce or consume data at the fastest rate possible for that device, the slower devices will not be able to keep up with the faster devices. If all devices are slowed to the rate of the slowest device on the system, the performance of the system will become unacceptably slow.
The problem of differing speed devices is sometimes addressed by including large buffers in each device to avoid overflow or underflow of data. To guarantee that the device can keep up, the buffer must be large enough to hold the largest possible burst data transfer. This requires a design trade-off between buffer size and maximum packet size of the burst data transfer. From a performance standpoint, it is desirable to have the largest possible maximum packet size to reduce the overhead of transferring large data blocks. From a cost standpoint, it is desirable to have a small packet size so that only a small buffer is required. Moreover, even buffers are not a complete solution to the problem. It is still necessary to have bus interface circuitry operating at the same speed on each card, sufficiently fast to empty or fill the buffer at the speed of the data transfer, so that design of I/O devices is still constrained.
Another approach to the problem of differing speed devices is to allow either device to trigger a pause at any point during the transmission. This requires that the devices be prepared to accept a pause indication after each word of data is transferred on the bus, which is typically accomplished with some form of handshaking exchange between the devices. Unfortunately, this reduces the speed of the data transfer (even where no pause indication is present), and adds complexity to the logic that must be present in the devices to handle the pauses. In effect, allowing a pause at any point defeats the purpose of burst transmission, which is to send data a rapidly as possible in an uninterrupted stream.
In the design of a communications bus, it is desirable to permit a variety of different types of devices operating at varying speeds to be attached to the bus, and to utilize the high speed characteristics of high speed devices, while still permitting low speed devices to be attached to the system. It is also desirable to avoid transmission overflows in the receiver's buffer, or underflows in the sender's buffer, without the need for large buffers. A variety of different communications protocols exist. However, these either require more hardware than minimally necessary or otherwise unduly constrain the performance or characteristics of the system.